System Reduction for Nanoscale IC Design

Resource Information

The work System Reduction for Nanoscale IC Design represents a distinct intellectual or artistic creation found in European University Institute. This resource is a combination of several types including: Work, Language Material, Books.

Label

System Reduction for Nanoscale IC Design

Statement of responsibility

edited by Peter Benner

Contributor

• Benner, Peter

Editor

• Benner, Peter

Subject

• Algorithms
• Applied mathematics
• Computer mathematics
• Computer-aided engineering
• Electronics
• Engineering mathematics
• Mathematical models
• Mathematics
• Microelectronics

Language

eng

Summary

This book describes the computational challenges posed by the progression toward nanoscale electronic devices and increasingly short design cycles in the microelectronics industry, and proposes methods of model reduction which facilitate circuit and device simulation for specific tasks in the design cycle. The goal is to develop and compare methods for system reduction in the design of high dimensional nanoelectronic ICs, and to test these methods in the practice of semiconductor development. Six chapters describe the challenges for numerical simulation of nanoelectronic circuits and suggest model reduction methods for constituting equations. These include linear and nonlinear differential equations tailored to circuit equations and drift diffusion equations for semiconductor devices. The performance of these methods is illustrated with numerical experiments using real-world data. Readers will benefit from an up-to-date overview of the latest model reduction methods in computational nanoelectronics.--

Member of

• Mathematics in Industry,, 20
• Springer eBooks, Mathematics and Statistics Collection

Assigning source

Provided by publisher

Image bit depth

0

Literary form

non fiction

Nature of contents

dictionaries

Series statement

• Springer eBooks
• Mathematics in Industry,

Series volume

20