The Resource System Reduction for Nanoscale IC Design, edited by Peter Benner, (electronic resource)
System Reduction for Nanoscale IC Design, edited by Peter Benner, (electronic resource)
Resource Information
The item System Reduction for Nanoscale IC Design, edited by Peter Benner, (electronic resource) represents a specific, individual, material embodiment of a distinct intellectual or artistic creation found in European University Institute Library.This item is available to borrow from 1 library branch.
Resource Information
The item System Reduction for Nanoscale IC Design, edited by Peter Benner, (electronic resource) represents a specific, individual, material embodiment of a distinct intellectual or artistic creation found in European University Institute Library.
This item is available to borrow from 1 library branch.
- Summary
- This book describes the computational challenges posed by the progression toward nanoscale electronic devices and increasingly short design cycles in the microelectronics industry, and proposes methods of model reduction which facilitate circuit and device simulation for specific tasks in the design cycle. The goal is to develop and compare methods for system reduction in the design of high dimensional nanoelectronic ICs, and to test these methods in the practice of semiconductor development. Six chapters describe the challenges for numerical simulation of nanoelectronic circuits and suggest model reduction methods for constituting equations. These include linear and nonlinear differential equations tailored to circuit equations and drift diffusion equations for semiconductor devices. The performance of these methods is illustrated with numerical experiments using real-world data. Readers will benefit from an up-to-date overview of the latest model reduction methods in computational nanoelectronics.--
- Language
- eng
- Extent
- 1 online resource (XI, 197 pages)
- Contents
-
- Preface
- 1 Model order reduction of integrated circuits in electrical networks: Michael Hinze, Martin Kunkel, Ulrich Matthes, and Morten Vierling
- 2 Element-based model reduction in circuit simulation: Andreas Steinbrecher and Tatjana Stykel
- 3 Reduced Representation of Power Grid Models: Peter Benner and André Schneider
- 4 Coupling of numeric/symbolic reduction methods for generating parametrized models of nanoelectronic systems: Oliver Schmidt, Matthias Hauser, and Patrick Lang
- 5 Low-Rank Cholesky Factor Krylov Subspace Methods for Generalized Projected Lyapunov Equations: Matthias Bollhöfer and André K. Eppler
- Index
- Isbn
- 9783319072364
- Label
- System Reduction for Nanoscale IC Design
- Title
- System Reduction for Nanoscale IC Design
- Statement of responsibility
- edited by Peter Benner
- Language
- eng
- Summary
- This book describes the computational challenges posed by the progression toward nanoscale electronic devices and increasingly short design cycles in the microelectronics industry, and proposes methods of model reduction which facilitate circuit and device simulation for specific tasks in the design cycle. The goal is to develop and compare methods for system reduction in the design of high dimensional nanoelectronic ICs, and to test these methods in the practice of semiconductor development. Six chapters describe the challenges for numerical simulation of nanoelectronic circuits and suggest model reduction methods for constituting equations. These include linear and nonlinear differential equations tailored to circuit equations and drift diffusion equations for semiconductor devices. The performance of these methods is illustrated with numerical experiments using real-world data. Readers will benefit from an up-to-date overview of the latest model reduction methods in computational nanoelectronics.--
- Assigning source
- Provided by publisher
- Image bit depth
- 0
- Literary form
- non fiction
- Nature of contents
- dictionaries
- http://library.link/vocab/relatedWorkOrContributorName
- Benner, Peter
- Series statement
-
- Springer eBooks
- Mathematics in Industry,
- Series volume
- 20
- http://library.link/vocab/subjectName
-
- Mathematics
- Computer-aided engineering
- Algorithms
- Computer mathematics
- Mathematical models
- Applied mathematics
- Engineering mathematics
- Electronics
- Microelectronics
- Label
- System Reduction for Nanoscale IC Design, edited by Peter Benner, (electronic resource)
- Antecedent source
- mixed
- Carrier category
- online resource
- Carrier category code
-
- cr
- Carrier MARC source
- rdacarrier
- Color
- not applicable
- Content category
- text
- Content type code
-
- txt
- Content type MARC source
- rdacontent
- Contents
- Preface -- 1 Model order reduction of integrated circuits in electrical networks: Michael Hinze, Martin Kunkel, Ulrich Matthes, and Morten Vierling -- 2 Element-based model reduction in circuit simulation: Andreas Steinbrecher and Tatjana Stykel -- 3 Reduced Representation of Power Grid Models: Peter Benner and André Schneider -- 4 Coupling of numeric/symbolic reduction methods for generating parametrized models of nanoelectronic systems: Oliver Schmidt, Matthias Hauser, and Patrick Lang -- 5 Low-Rank Cholesky Factor Krylov Subspace Methods for Generalized Projected Lyapunov Equations: Matthias Bollhöfer and André K. Eppler -- Index
- Control code
- 978-3-319-07236-4
- Dimensions
- unknown
- Extent
- 1 online resource (XI, 197 pages)
- File format
- multiple file formats
- Form of item
-
- online
- electronic
- Governing access note
- Use of this electronic resource may be governed by a license agreement which restricts use to the European University Institute community. Each user is responsible for limiting use to individual, non-commercial purposes, without systematically downloading, distributing, or retaining substantial portions of information, provided that all copyright and other proprietary notices contained on the materials are retained. The use of software, including scripts, agents, or robots, is generally prohibited and may result in the loss of access to these resources for the entire European University Institute community
- Isbn
- 9783319072364
- Level of compression
- uncompressed
- Media category
- computer
- Media MARC source
- rdamedia
- Media type code
-
- c
- Other control number
- 10.1007/978-3-319-07236-4
- Other physical details
- 73 illustrations, 39 illustrations in color.
- Quality assurance targets
- absent
- Reformatting quality
- access
- Specific material designation
- remote
- System control number
- (OCoLC)989816430
- Label
- System Reduction for Nanoscale IC Design, edited by Peter Benner, (electronic resource)
- Antecedent source
- mixed
- Carrier category
- online resource
- Carrier category code
-
- cr
- Carrier MARC source
- rdacarrier
- Color
- not applicable
- Content category
- text
- Content type code
-
- txt
- Content type MARC source
- rdacontent
- Contents
- Preface -- 1 Model order reduction of integrated circuits in electrical networks: Michael Hinze, Martin Kunkel, Ulrich Matthes, and Morten Vierling -- 2 Element-based model reduction in circuit simulation: Andreas Steinbrecher and Tatjana Stykel -- 3 Reduced Representation of Power Grid Models: Peter Benner and André Schneider -- 4 Coupling of numeric/symbolic reduction methods for generating parametrized models of nanoelectronic systems: Oliver Schmidt, Matthias Hauser, and Patrick Lang -- 5 Low-Rank Cholesky Factor Krylov Subspace Methods for Generalized Projected Lyapunov Equations: Matthias Bollhöfer and André K. Eppler -- Index
- Control code
- 978-3-319-07236-4
- Dimensions
- unknown
- Extent
- 1 online resource (XI, 197 pages)
- File format
- multiple file formats
- Form of item
-
- online
- electronic
- Governing access note
- Use of this electronic resource may be governed by a license agreement which restricts use to the European University Institute community. Each user is responsible for limiting use to individual, non-commercial purposes, without systematically downloading, distributing, or retaining substantial portions of information, provided that all copyright and other proprietary notices contained on the materials are retained. The use of software, including scripts, agents, or robots, is generally prohibited and may result in the loss of access to these resources for the entire European University Institute community
- Isbn
- 9783319072364
- Level of compression
- uncompressed
- Media category
- computer
- Media MARC source
- rdamedia
- Media type code
-
- c
- Other control number
- 10.1007/978-3-319-07236-4
- Other physical details
- 73 illustrations, 39 illustrations in color.
- Quality assurance targets
- absent
- Reformatting quality
- access
- Specific material designation
- remote
- System control number
- (OCoLC)989816430
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<div class="citation" vocab="http://schema.org/"><i class="fa fa-external-link-square fa-fw"></i> Data from <span resource="http://link.library.eui.eu/portal/System-Reduction-for-Nanoscale-IC-Design-edited/85CUa8qivFY/" typeof="Book http://bibfra.me/vocab/lite/Item"><span property="name http://bibfra.me/vocab/lite/label"><a href="http://link.library.eui.eu/portal/System-Reduction-for-Nanoscale-IC-Design-edited/85CUa8qivFY/">System Reduction for Nanoscale IC Design, edited by Peter Benner, (electronic resource)</a></span> - <span property="potentialAction" typeOf="OrganizeAction"><span property="agent" typeof="LibrarySystem http://library.link/vocab/LibrarySystem" resource="http://link.library.eui.eu/"><span property="name http://bibfra.me/vocab/lite/label"><a property="url" href="http://link.library.eui.eu/">European University Institute Library</a></span></span></span></span></div>